Typical techniques of low power consumption (power saving) control technology of a semiconductor integrated circuit (LSI) include defining an operating state and a standby state for a circuit to be controlled to reduce power consumption in the standby state in which the circuit performs no processing.
A concrete implementation method for reducing power consumption in the standby state includes the reduction of a dynamic current by clock gating and the reduction of a leak current by power supply shutdown. The clock gating only slightly affects system performance due to a return to normal operation at high speed, but the effect thereof to reduce power consumption is inferior to the power supply shutdown. The reverse thereof applies to the power supply shutdown and while the effect of reducing power consumption is large, it takes time to return to normal operation and thus, the software control and system performance are significantly affected.
To combine lower power consumption and improved system performance, each application needs tuning of control and throughput, leading to increased development costs. For example, the work to determine whether or not to incorporate power saving control in accordance with the length of the standby time in an application and to implement software by minutely investigating whether to adopt only clock gating or both of clock gating and power supply shutdown as a means of power saving is needed.